Siemens Digital Industries Software today announced the Questa™ One smart verification software portfolio, combining connectivity, a data driven approach and scalability with AI to push the boundaries of the Integrated Circuit (IC) verification process and make engineering teams more productive.
Questa One delivers faster engines, enables faster engineers and requires fewer workloads to support the largest, most complex designs from IP to System-on-a-chip (SoC) to Systems, and was developed with advanced 3D-ICs, chiplet-based designs and software-defined architectures in mind.
“Questa One transforms the IC design process to address the verification productivity gap and solves the IC industry’s rapidly growing challenges associated with increasingly complex designs,” said Abhi Kolpekwar, vice president & general manager, Digital Verification Technologies, Siemens Digital Industries Software. “Questa One uses new technical advances to deliver the fastest functional, fault and formal verification engines available, yet customers tell us that performance alone isn’t enough - they also need deeper connectivity across our unmatched verification, validation and test workflows, which Questa One provides. Combined with our application of AI, Siemens’ verification solutions are truly yielding step-function gains in productivity by early adopters across smart creation, smart regression, smart analysis, smart engine and smart debug domains.”
Siemens has worked with industry leaders to develop the Questa One smart verification solution that delivers a connected, data-driven, scalable solution that breaks the Verification Productivity Gap 2.0 bottleneck, whereby the increasing complexity of technologies such as 3D-ICs, chiplet-based designs and software-defined architectures are further compounded by a critical talent shortage, and growing demands for enhanced security, lower power consumption, reliability and sustainability.
The Questa One smart verification solution encompasses multiple technical breakthroughs including:
- Questa One Coverage Acceleration software has achieved coverage goals 50x faster than traditional testbench solvers combining higher/faster coverage results with the benefits of Universal Verification Methodology (UVM) constrained random test generation.
- Questa One DFT Simulation Acceleration software has achieved 8x faster gate-level design for test (DFT) serial pattern simulations leveraging Questa One Parallel Simulation software and is tightly integrated with the industry-leading Tessent™ Streaming Scan Network (SSN) architecture.
- Questa One Fault Simulation Acceleration software has delivered 48x faster performance and supports both functional safety and DFT fault simulation applications. It uniquely supports the User Defined Fault Modeling (UDFM) capability in Tessent.
- Questa One Stimulus Free Verification software empowers engineers to achieve new levels of productivity. Its unique approach of combining engines and unifying applications has shown to reduce overall processing times from over 24 hours to under 1 minute on complex open source SoC level reference designs. The integration of 20 different stimulus-free analyses, AI and automation deliver new solutions such as linting with auto-correction and generative AI SVA property creation and verification.
Questa One Avery Verification IP software is based on Avery’s high-quality VIP and high-coverage Compliance Test Suites (CTS). Protocol-aware debug and protocol-aware coverage analytics help increase productivity, and accelerated VIP enables the same CTS, testbench and stimulus on Questa One Sim to be re-used on Veloce CS emulation and prototyping systems.
The Questa One smart verification solution is founded on three core principles.
- Questa One Connected Verification software connects engineers, EDA tools and verification IP to form a cohesive ecosystem for comprehensive and seamless verification, validation, and test across Siemens’ Questa One, Tessent DFT and Veloce™ CS emulation and prototyping systems.
- Questa One Data-Driven Verification software leverages the power of data through AI-powered analytics to bring new insights and to improve verification productivity. Applications of generative, prescriptive and predictive machine learning technologies enable engineers to achieve the highest levels of verification with the fewest resources.
- Questa One Scalable verification software delivers acceleration and automation second-to-none, with speeds that deliver the fastest verification closure and the highest degree of confidence.
Customer experiences using Questa One
“The Questa One Smart Verification Solution has improved our verification productivity across traditional on-premises and cloud deployments,” said Karima Dridi, Head of Productivity Engineering, Arm. “As an early adopter of running large EDA workloads using the high-performance Questa One Sim advanced functional simulator, we’ve observed improvements in performance, cost-efficiency, and reduction in regression time on the latest AArch64 architecture.”
“As an early influencer on Siemens Questa One Smart Verification Solution, MediaTek has already been able to increase our engineers’ productivity across the entire verification process utilizing both formal verification and simulation technologies,” said Chienlin Huang, senior technical manager of Connectivity Technology Department, MediaTek.
“Questa One DFT (QDX) simulation utilizes advanced DFT-centric simulation capabilities to deliver faster performance than existing simulation solutions, slashing our verification time from weeks to days,” said Selim Bilgin, corporate vice president, Silicon Engineering at Microsoft. “In addition to these impressive speed ups, on Microsoft’s Azure Cobalt 100 platform, QDX delivers up to 20 percent further performance jump unlocking even greater efficiency for our EDA workloads.”
“Siemens’ Questa One smart verification solution has improved and streamlined our verification process, enabling us to address new-era data center workloads like generative AI with state-of-the-art silicon IP solutions for PCIe, CXL and HBM interfaces,” said Susheel Tadikonda, vice president of Engineering, Silicon IP at Rambus. “Leveraging the complete Questa One solution, including simulation, static and formal analysis, and verification IP technologies, brings increased confidence to our customers through comprehensive verification of IP solutions for their SoC and chiplet designs.”
Availability
The Questa One smart verification solution will be available in June 2025. To learn more about how Siemens is enabling the semiconductor and electronic systems industry to deliver to market the world’s most advanced 3D-ICs, chiplet-based designs, and software-defined systems, visit https://eda.sw.siemens.com
